There are many portable electronic devices and apparatus, especially in consumer electronics, that use a battery (cell) as their power supply. The voltage supplied from the cell does not necessarily match the voltage level required in the electronic devices. Thus, a need exists to boost the supplied voltage to provide a higher voltage to internal circuits in the electronic devices. A typical prior voltage converting device having such boosting function is shown in FIG. 1.
A boosting circuit 30 receiving power supply voltage Vdd includes a coil 32, a transistor 34 which may be a MOS FET, and a diode 36. One end of coil 32 is connected to power supply line 31, and the other end is connected to the drain of transistor 34. The source of transistor 34 is grounded, and the gate thereof is connected to the output of an AND circuit 2. The cathode and anode of diode 36 are connected to the drain and source of transistor 34, respectively.
A saw tooth generating circuit 10 provides a saw tooth output ST to a soft start circuit 20. Soft start circuit 20 provides a pulse output P1 to one input of AND circuit 2. The pulse widths of pulse output P1 increase gradually as shown in FIG. 3. This gradual increase is needed for stably starting initial operation. The output of AND circuit 2 is connected to the gate of transistor 34.
Coupled to a node 33 between coil 32 and MOS transistor 34 is a gate circuit 40, comprising a diode 46 and a transistor 44 which may be a MOS FET. A boosted output is supplied from boosting circuit 30 through gate circuit 40 to a smooth circuit 50. A smoothed output voltage Vo is obtained from smooth circuit 50 at an output terminal 58 and supplied to every circuit in the electronic device.
Pulse output P3 of AND circuit 2 is also coupled to the gate of transistor 44 through an inverter 4.
Output voltage Vo of smooth circuit 50 is also supplied to a pulse width control circuit 60. Pulse width control circuit 60 receives a saw tooth output ST from saw tooth generating circuit 10, and provides a modulated pulse signal P2 to the other input of AND circuit 2. The low pulse duration of modulated pulse signal P2, as shown in FIG. 3, becomes long as output voltage Vo becomes high. Pulse output P3 of AND circuit 2 is high only when both pulse output P1 of soft start circuit 20 and pulse output P2 of pulse width control 60 are high.
The operation of prior voltage converting device 1 will now be described with reference to FIG. 2 showing more specific circuit of prior device 1 and FIG. 3 illustrating operational timing chart of device 1. In saw tooth circuit 10, pulses generated by an oscillator 12 is divided by frequency divider 14 to get a low frequency pulse signal. A saw tooth generator 16 receives the low frequency pulse signal from frequency divider 14, generates a saw tooth signal ST (see FIG. 3), and supplies it to the inverting input of an operational amplifier 22 in soft start circuit 20.
The non-inverting input of operational amplifier 22 is connected to one end of a capacitor 26. To this end of capacitor 26, power supply voltage Vdd is also coupled through a constant current supply and a switch 24. The other end of capacitor 26 is grounded. The constant current supply and capacitor 26 forms an integral circuit, and therefore capacitor starts charging or accumulation when switch 24 is closed. When a voltage V1 accumulated on capacitor 26 is higher than saw tooth voltage ST, operational amplifier 22 provides high output(see FIG. 3). Because saw tooth voltage ST has a constant cycle time and capacitor voltage V1 becomes gradually higher, operational amplifier 22 has a pulse output signal P1, the width of which increases gradually(see FIG. 3). This pulse output P1 is supplied to the gate of MOS transistor 34 in boosting circuit 30 via AND circuit 2.
In response to the control pulse applied by AND circuit 2, transistor 34 alternately turns on and off. When transistor 34 is on, a current flows from power line 31 through coil 32 and transistor 34 to the ground, and therefore the voltage level at node 33 becomes low (the drain-to-source voltage of transistor 34). Then, the pulse from AND circuit 2 becomes low and turns off transistor 34. When transistor 34 turns off, the current through coil 32 tends to continue flowing but can not due to the high resistances of transistor 34 and diode 36. Thus an induced electromotive force creates at node 33 a voltage higher than power supply voltage Vdd. This induced voltage is supplied through gate circuit 40 to smooth circuit 50.
The logical output of AND circuit 2 is also applied through inverter 4 to the gate of FET transistor 44. Therefore, while transistor 34 is off, transistor 44 is on. The induced voltage created by the inductance of coil 34 makes a current flow from node 33 through transistor 44 to smooth circuit 50, which accumulates a high voltage. Next, when transistor 34 turns on, it allows current flow from power supply voltage Vdd to the ground, and the voltage of node 33 becomes low again. At this time transistor 44 is off, and a counter current does not flow from smooth circuit 50 to boosting circuit 30. In this manner, transistor repeats turning on and off, the boosted charge is accumulated at smooth circuit 50.
The pulsating voltage entering into smooth circuit 50 is smoothed by capacitors 54, 56 and a coil 52. The boosted and smoothed output voltage Vo can be taken out an output terminal 58 and supplied to other electronic circuits including voltage dividing resistors 61, 62 in pulse width control circuit 60.
At the first stage in the initial operation period, the amount of the current from power supply through coil 32 to the ground has to be restricted in order to prevent over load and stably start the boosting operation. For that purpose, the turning-on duration of transistor 34 is shortened by initially lowering the duty ratio of the pulse signal P1 applied to the gate of transistor 34. Then, as shown in FIG. 3, the turning-on duration of transistor 34 is made longer gradually by soft start circuit 20 to gradually increase output voltage Vo appearing at output terminal 58.
Output voltage Vo from smooth circuit 50 is fed back to pulse width control circuit 60, divided by resistors 61, 62, and supplied to the non-inverting input of an operational amplifier 64. A first reference voltage Vrfl is given to the inverting input of operational amplifier 64 via a resistor 63. The voltage difference between the non-inverting input voltage and first reference voltage Vrfl is amplified with a ratio determined by resistors 63, 65. The amplified voltage difference is then compared with saw tooth voltage ST in an operational amplifier 66 to provide a pulse signal P2 (see FIG. 3).
If output voltage Vo becomes higher than a desired level, pulse width control circuit 60 shorten the turning-on duration of transistor 34. For that purpose, the low pulse duration of pulse P2, which disables AND circuit 2, is made longer as shown in FIG. 3. A resultant logical output P3 of AND circuit 2 shown in FIG. 3 controls the operation of boosting circuit 30 to obtain the desired output voltage. In this manner, the desired voltage level is maintained irrespective of load variation.
Although the ideal operation of prior voltage converting device 1 has been described, device 1 actually does not necessarily operate well as described above. That is, current Ic flowing through coil 32 does not necessarily follow the solid line shown in FIG. 4, but may follow the dotted line in FIG. 4. Because the low pulse duration of pulse signal P1 and therefore the turning-on duration of transistor 44 is long at the beginning in the initial operation period, a counter current flows from high voltage smooth circuit 50 to boosting circuit 30 after coil current Ic decreases to zero (see the dotted line in FIG. 4). Accordingly the normal start of operation is not guaranteed in the prior converting device.